I. Field of the Disclosure
The technology of the disclosure relates generally to diodes, and more particularly to reducing current leakage in diodes.
II. Background
Electrostatic discharge (ESD) is a common cause of reliability problems in integrated circuits (ICs). ESD is a transient surge in voltage (negative or positive) that can induce a large current in a circuit. To protect circuits against damage from ESD surges, protection schemes attempt to provide a discharge path for both positive and negative ESD surges. Conventional diodes can be employed in ESD protection circuits to clamp the voltage of positive and negative ESD surges to shunt and prevent excessive current from being applied to a protected circuit.
For example, FIG. 1 illustrates an exemplary ESD protection circuit 100 configured to provide ESD protection to a protected circuit 102. The ESD protection circuit 100 is coupled between a voltage rail 104 and a ground rail 106 so as to protect the protected circuit 102 from both positive and negative ESD surges. In this manner, the ESD protection circuit 100 includes a positive surge diode 108 and a negative surge diode 110. The positive surge diode 108 clamps positive voltage on a signal pin 112. In particular, in response to positive ESD surges on the signal pin 112, the positive surge diode 108 is forward-biased and clamps voltage on the signal pin 112 to one diode drop above the voltage rail 104. Energy from such a positive ESD surge is conducted through the positive surge diode 108 in a forward-biased mode and dispersed onto the voltage rail 104. In contrast, the negative surge diode 110 clamps negative voltage on the signal pin 112. More specifically, in response to negative ESD surges on the signal pin 112, the negative surge diode 110 is forward-biased so as to provide a low-impedance path relative to the protected circuit 102. Energy from the negative ESD surge dissipates onto the ground rail 106.
While the ESD protection circuit 100 in FIG. 1 provides protection against ESD surges, various design parameters of the ESD protection circuit 100 can negatively impact corresponding ICs. For example, as the positive and negative surge diodes 108, 110 are scaled down to a node size of ten (10) nanometers (nm) and below, the positive and negative surge diodes 108, 110 experience an increase in current leakage, thus increasing power consumption of the ESD protection circuit 100. The increased power consumption resulting from the higher current leakage can reduce the battery life of a mobile computing device (e.g., a smart phone, tablet, etc.) employing the ESD protection circuit 102. Thus, it would be advantageous to reduce the current leakage corresponding to the positive and negative surge diodes 108, 110 so as to decrease the power consumption of the ESD protection circuit 100.